Master's and Bachelor's Theses
The Systems Group has a variety of projects available, as possible topics for a Masters Thesis, a Semester Projects, or as labs for bachelors or masters students.
Proposals
- protected page Oasis: Accelerating Data Transformations in Data Warehouses [BT/SP/MT] (PDF, 184 KB)
- protected page Accelerating quantised transformers on FPGAs [SP / MT] (PDF, 193 KB)
- protected page Optimizing Compound AI Systems [MT/Semester Project] (PDF, 112 KB)
- protected page Celeris: Hardware-accelerated Query Engine for Data Analytics [BT/SP/MT] (PDF, 194 KB)
- protected page Resource Utilization Analysis of Large Video Generation Models Across Datacenter and Consumer GPUs [BT/SP/MT] (PDF, 57 KB)
- protected page FPGA-Accelerated HTTP Server for LLM Inference [MT] (PDF, 82 KB)
- protected page Vector Search and Vector Databases Projects [BT/SP/MT] (PDF, 187 KB)
- protected page A Ternary LLM Accelerator based on FPGA [BT/SP/MT] (PDF, 129 KB)
- protected page Exploring LLMs for Complex Hardware Circuit Design [SP/MT] (PDF, 174 KB)
- protected page Hardware-accelerated Boosted Decision Trees for Computer System Optimization [MT/SP] (PDF, 178 KB)
- protected page Databases and Hardware Acceleration [SP/MT] (PDF, 281 KB)
- protected page Accelerating Genetic Algorithms for Routing Problems with Heterogeneous Computer Systems [SP] (PDF, 221 KB)
- protected page ML-based Deep Bitstream Inspection for Serverless FPGAs [SP] (PDF, 231 KB)
- protected page RDMA-centric Storage Engine in FPGA [BT/SP/MT] (PDF, 85 KB)
- protected page Vector Database and Retrieval Augmented Generation in Distributed Object Storage Systems [BT/SP/MT] (PDF, 83 KB)
- protected page Resource Booking System for Heterogeneous Compute Clusters [SP] (PDF, 117 KB)
There are several thesis projects available within the NetOS group, related to our main projects Enzian, Kirsch, and Sockeye:
- protected page An NVMe driver for the Kirsch OS (PDF, 152 KB)
- protected page CHERIless Cheriette for the Kirsch Project (PDF, 114 KB)
- protected page ECI link simulation (PDF, 132 KB)
- protected page Finding vulnerabilities and documentation bugs by reasoning about memory accesses on a System-on-Chip: the Broadcom BCM2711 and BCM2712 (PDF, 136 KB)
- protected page Finding vulnerabilities and documentation bugs by reasoning about memory accesses on a System-on-Chip: the Nvidia Orin series (PDF, 136 KB)
- protected page Finding vulnerabilities and documentation bugs by reasoning about memory accesses on a System-on-Chip: the Samsung Exynos 9630 (PDF, 136 KB)
- protected page Finding vulnerabilities and documentation bugs by reasoning about memory accesses on a System-on-Chip: the SiFive FU740 RISC-V SoC (PDF, 136 KB)
- protected page Integrating ECI and TileLink (PDF, 65 KB)
- protected page Message Tracking for Persistence on Enzian (PDF, 121 KB)
- protected page Performance models of far memory systems implemented on Enzian (PDF, 137 KB)
- protected page Porting Dandelion to the Lauberhorn smart NIC (PDF, 120 KB)
- protected page Reliable transport for the Lauberhorn smart NIC (PDF, 132 KB)
- protected page Rust specification of the Intel 64 and ia32 Memory Management Unit (PDF, 144 KB)
- protected page Rust and Sockeye specification of the RISC-V Memory Management Unit (PDF, 129 KB)
- protected page Sockeye models for the CHERI hardware capability architecture (PDF, 128 KB)
- protected page Validation of address translation models against real hardware (PDF, 123 KB)
Contact Timothy Roscoe () if you are interested in any of them.
Contact Michal Friedman () with your CV and transcript of records if you are interested in any of them.